We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 39966

12.4 Place - When and how should IODELAY_GROUP constraints be used?


The IODELAY_GROUP constraint is not well documented. When and how should this constraint be used?


Some form of IODELAY grouping is needed because the model for Virtex devices does not include any signal net connectivity between IDELAYCTRL components and their associatedIODELAY components. Without any net connectivity, the Placer tool needs another mechanism to properly group and place these components.
From the beginning, there has always been default IODELAY grouping in that all unconstrained IODELAYs and a single unconstrained IDELAYCTRL would become a group by default whether that group included all delay elements in the design, or a subset. The unconstrained IDELAYCTRL would then be automatically replicated to every bank where needed.
The IODELAY_GROUP constraint extends this functionality so that multiple groups can be left otherwise unconstrained and replicationis handled automatically. Unconstrained delay elements still become a default group as long as there is only one unconstrained IDELAYCTRL. Every IODELAY_GROUP should contain only a single IDELAYCTRL whichis automatically replicated as needed.
To summarize, there are three strategies for the handling of IODELAY groups:
  1. IODELAYs and IDELAYCTRLs can be constrained to banks as needed. Manual replication of the constrained IDELAYCTRLs is necessary to provide a controller for each bank.
  2. IODELAYs and a single IDELAYCTRL can be left entirely unconstrained, becoming a default group. The IDELAYCTRLis replicated depending on bank usage.
  3. One or more IODELAY_GROUPs can be defined that contain IODELAYs and a single IDELAYCTRL each. These components can be otherwise unconstrained and the IDELAYCTRL for each groupis automatically replicated as needed (depending on bank usage).

These three constraining techniques are not mutually exclusive and can be combined together (i.e., some delay elements can be manually constrained, some can be assigned to a group, and some can be left unconstrained to become a default group). However, these three techniques should not overlap the same components, and each group should only have one controller which can then be replicated automatically.
AR# 39966
Date Created 01/06/2011
Last Updated 04/28/2014
Status Active
Type General Article
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • More
  • Virtex-5 SXT
  • Virtex-5 TXT
  • Virtex-5Q
  • Virtex-5QV
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Virtex-6Q
  • Virtex-7
  • Virtex-6
  • Artix-7
  • Kintex-7
  • Less
  • ISE Design Suite - 14
  • Vivado Design Suite - 2014.1
  • Vivado Design Suite - 2013.4