^

AR# 40051 12.4 EDK, AXI_DMA - ** Fatal: (vsim-3421) Value 52 is out of range 0 to 51.

When using the AXI_DMA in EDK 12.3 or 12.4, the following error occurs:

** Fatal: (vsim-3421) Value 52 is out of range 0 to 51.
Time: 20850615 ps Iteration: 1 Process: axi_dma_i/i_sg_engine/i_sg_fetch_queue/gen_ch1_ftch_q_if/gen_ch1_queue/i_ch1_ftch_fifo/v6_s6_and_later/i_sync_fifo_bram/gconvfifo/inst_conv_fifo/gen_ss/fgss/gnecc_mem/wr_mem File: ISE_DS/ISE/vhdl/src/XilinxCoreLib/fifo_generator_v8_1.vhd
Fatal error in Process wr_mem at ISE_DS/ISE/vhdl/src/XilinxCoreLib/fifo_generator_v8_1.vhd line 2297

How do I resolve this error?

This issue is planned to be fixed starting with EDK 13.1.
AR# 40051
Date Created 01/13/2011
Last Updated 01/13/2011
Status Active
Type
Tools
  • EDK - 12.3
  • EDK - 12.4
  • EDK - 13.0
IP
  • AXI DMA
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