Description
Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System.
This Design Advisory covers the Xilinx 10G Ethernet Cores: 10G Ethernet MAC, XAUI, RXAUI and10G Ethernet PCS/PMA.
Solution
Design Advisories 1/25/2011 -
(Xilinx Answer 39492) - LogiCORE IP XAUI - GTX Transceiver Delay Aligner Errata and Work-around
1/25/2011 -
(Xilinx Answer 39493) - LogiCORE IP RXAUI - GTX Transceiver Delay Aligner Errata and Work-around
To update your Xilinx Alert Notification Preferences, please go to:
http://www.xilinx.com/support/myalertsRevision History 1/25/2011 - Added Answer Record 39492 and 39493.