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AR# 40235

Design Advisory for 10G Ethernet Cores - 10G Ethernet MAC, XAUI, RXAUI, 10G Ethernet PCS/PMA


Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System.

This Design Advisory covers the Xilinx 10G Ethernet Cores: 10G Ethernet MAC, XAUI, RXAUI and10G Ethernet PCS/PMA.


Design Advisories
1/25/2011 - (Xilinx Answer 39492) - LogiCORE IP XAUI - GTX Transceiver Delay Aligner Errata and Work-around
1/25/2011 - (Xilinx Answer 39493) - LogiCORE IP RXAUI - GTX Transceiver Delay Aligner Errata and Work-around

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Revision History
1/25/2011 - Added Answer Record 39492 and 39493.
AR# 40235
Date Created 01/27/2011
Last Updated 02/11/2013
Status Active
Type Design Advisory