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AR# 4034

SYNPLIFY: Conditions of "Force GSR Usage" - to generate the STARTUP block?

Description

Keywords: Synplify, xc4000, xc5200, Virtex, GSR, GR, STARTUP, STARTUP_VIRTEX

Urgency: Standard

General Description:
What are the conditions for which Synplify will generate the
STARTUP block?

Solution

Synplify will generate the STARTUP block under the following
conditions:

(1) All the FFs in the design are coded to have a common reset
signal. By default, if there is a common reset used throughout
the entire design, then Synplify will infer the STARTUP cell and
connect the reset signal to the GSR/GR pin. This is irrespective
of whether "Force GSR Usage" is enabled or disabled. Please
see (Xilinx Solution 5023)

(2) The design has some FFs coded with NO reset signal and some
FFs coded with a reset signal. In this case, "Force GSR Usage"
option will make a difference. STARTUP will not be inferred unless
you enable this option.

To turn off the "Force GSR Usage" option, choose "Set Device Options"
from the "Target" menu, and deselect the checkbox.

NOTE: This option is ineffective when synthesizing for Virtex designs.
The STARTUP_VIRTEX will not be synthesized under any condition.
Due to the abundance of local routing, Xilinx recommends using the
local routing than the slower, dedicated GSR routing network. Please
see (Xilinx Solution 6583)
AR# 4034
Date Created 06/08/1998
Last Updated 04/24/2007
Status Archive
Type General Article