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AR# 40430

12.4 EDK - AXI IP reset signal is not identified correctly in the CIP Wizard


When I import the AXI slave HDL during my Create and Import Peripheral Wizard session, I expect "SIGIS = RST" to be automatically provided for S_AXI_ARESETN in the MPD file.


To work around this problem, you can manually set the reset port's attributes.

In this case, at [Port Attributes] phase in CIP Wizard, select [- List All Ports -], select S_AXI_ARESETN, add check [Display advanced attribute], then you can set [Signal Classification] to [Reset signal].

Then, "SIGIS = RST" is added into you MPD.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34609 12.x EDK - Master Answer Record List N/A N/A
AR# 40430
Date Created 02/14/2011
Last Updated 12/15/2012
Status Active
Type General Article
  • EDK - 12.4
  • EDK - 12.3