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AR# 40516 12.4/13.1 EDK AXI_Ethernet - AXI Ethernet hardware needs extra delays for accessing the registers after a core reset

Description

It has been observed that the AXI Ethernet hardware needs a certain amount of delay after a core reset before the core registers can be accessed.

Solution

The driver file has been updated to insert adelay loop to wait for a few milliseconds after every core reset. This patch applies to AXI Ethernet systems in EDK 12.3, 12.4 and 13.1.

The patched driver file can be downloaded from the following location:
http://www.xilinx.com/txpatches/pub/applications/misc/ar40516_axiethernet.zip

  1. Replace the xaxiethernet.c file in the AXI Ethernet driver in the install area, <EDK_Install>\sw\XilinxProcessorIPLib\drivers\axiethernet_v1_01_awith the file in the patch.
  2. Clean the software libraries inSDK and rebuild the libraries and software application.

Thiis issue is scheduled to be fixed in the EDK 13.2 release.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34609 12.x EDK - Master Answer Record List N/A N/A
39843 13.x EDK - Master Answer Record N/A N/A

Actions

AR# 40516
Date Created 03/03/2011
Last Updated 05/20/2012
Status Active
Type Design Advisory
IP
  • AXI Ethernet
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