XST may optimize logic to improve area utilization and power. These optimizations will not affect the logic in the design. The synthesis report will report any logic that is optimized with a
warning or an
info. For help reading through the XST report, please see
(Xilinx Answer 40379).
Below are some of the optimizations XST may include in a design:
See
(Xilinx Answer 20476) for information on Equivalent Register Removal.
See
(Xilinx Answer 40786) for information on registers being trimmed due to being tied a constant value.