New Features - ISE 13.1 software support
- Support for Virtex-7 and Kintex-7 devices
- SGMII PHY mode
Supported Devices
- Virtex-7 XC
- Kintex-7 XC
- Virtex-6 XC CXT/LXT/SXT/HXT
- Virtex-6 XQ LXT/SXT
- Virtex-6 -1L XC LXT/SXT
- Spartan-6 XC LX/LXT
- Spartan-6 XQ LX/LXT
- Virtex-5 XC LX/LXT/SXT/TXT/FXT
- Virtex-5 XQ LX/LXT/SXT/FXT
- Virtex-4 XC LX/SX/FX
- Spartan-3 XC
- Spartan-3A XC 3AN/3A DSP
- Spartan-3E XC
Resolved Issues - (Xilinx Answer 36957) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v10.5 - GMII setup/hold errors seen when targeting Virtex-6 HXT
- (Xilinx Answer 36961) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v10.5 - Timing failure on Spartan-6 TBI interface
- (Xilinx Answer 37219) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v10.5 - Timing Errors seen in some cases using Virtex-6 LVDS Solution
- (Xilinx Answer 35681) - Virtex-6 GTX Transceiver - MMCM fails to lock and TX/RXRESETDONE fails to assert
Known Issues inv11.1 Rev1 - (Xilinx Answer 35338)- LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII - Meeting GMII setup and hold times on an external interface when targeting Spartan-6 FPGAs
- (Xilinx Answer 39193) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v10.5 - GTP/GTX Physical DRC failure in MAP
- (Xilinx Answer 40897) - LogiCORE IP - X's seen in Modelsim 6.6c functional or timing simulation
- (Xilinx Answer 40535) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v11.1 and earlier - Auto-Negotiation Next page functionality is not supported
- (Xilinx Answer 42672) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v11.1 - 7 Series Transceiver Wrapper - GT Port Name Changes in ISE 13.2
- (Xilinx Answer 42842) - 7 Series GTX Transceiver - PLLREFCLK selection change causing simulation issue in ISEDesign Suite 13.1
- (Xilinx Answer 43058) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v11.1 - Why does the Example Design fail in BitGen when targeting Virtex-7 or Kintex-7 devices?
- (Xilinx Answer 43059) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v11.1 - Error - Invalid target device when running Virtex-7 Example design in 13.2 and later
- (Xilinx Answer 44958) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v11.1 - Example Design Simulation Does NotWork in ISE 13.2/13.3
- (Xilinx Answer 44937) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v11.1 - Changes required to implement the core on 7-Series Initial ES silicon
Resolved Issues in v11.1 Rev1
- (Xilinx Answer 43421) - LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v11.1 - GMII_RX_ER not asserted when link lost during frame
Download Rev1 Update
To install the v11.1 rev1 update, apply the following patch to the Xilinx ISE 13.2 installation:
http://www.xilinx.com/txpatches/pub/swhelp/ise13_updates/ar43421_gig_eth_pcs_pma_v11_1_rev1.zip
Install the patch by extracting the contents of the ".zip" archive to the root directory of the Xilinx ISE 13.2 installation. Select the option that allows the extractor to overwrite all of the existing files and maintain the directory structure predefined in the archive.
After installing the patch, regenerate the Ethernet 1000BASE-X PCS/PMA or SGMII v11.1 LogiCORE in the CORE Generator tool. For more information on finding the Xilinx installation and using environment variables, see (Xilinx Answer 11630).
Note: You might need system administrator privileges to install the patch if you do not have write permissions to the Xilinx installation directory.