UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 40686

MIG Spartan-6 MCB - JEDEC Specification: DDR3 SDRAM Reset Pin

Description

This section of the MIG Design Assistant focuses on the Reset Pin defined by the JEDEC Specification as it applies to the MIG Spartan-6 MCB designs.

Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.

Solution

The Reset Pin is a new feature in DDR3 Memories and is defined in section 3.3 of JEDEC specification JESD79-3 DDR3 SDRAM Standard. The Reset Pin is used during the memory initialization procedure and is required. As a result, it is not possible to omit this signal from the pin-out.

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
40685 MIG Spartan-6 MCB - JEDEC Specification N/A N/A
AR# 40686
Date Created 08/22/2011
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
IP
  • MIG