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AR# 40737

MIG Spartan-6 MCB - Self-Refresh as defined by JEDEC Specification

Description

This section of the MIG Design Assistant focuses on the Self-Refresh operation, defined by the JEDEC Specification, as it applies to the MIG Spartan-6MCB designs.

NOTE: This Answer Record is part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.

Solution

The Self-Refresh operation is defined in section 4.10 of the JEDEC Specification JESD79-2 DDR3 SDRAM Standard and 2.10 of the JESD79-3 DDR2 SDRAM Standard, and can be used to save power by powering down the memory controller and placing the memory into a self-refresh state.

This feature is supported by the Spartan-6 MCB for LPDDR, DDR2, and DDR3 memories. For more information, refer tothe Spartan-6 FPGA Memory Controller User Guide(UG388); see the MCB Operation -> Self-Refresh section:
http://www.xilinx.com/support/documentation/ip_documentation/ug388.pdf

NOTE: For information on how Auto-Refresh is used with the MIG Spartan-6 MCB, see (Xilinx Answer 34154).

See also:
(Xilinx Answer 36020) Signal 'selfrefresh_enter' is floating in the generated MIG design. Should this be left floating in a user design?
(Xilinx Answer 41309)Do I need to add a TIG to SELFREFRESH_MCB_REQ if I enable Self-Refresh on the MCB?
(Xilinx Answer 41310)How to use Self-Refresh with the Spartan-6 Suspend feature

Linked Answer Records

Associated Answer Records

AR# 40737
Date Created 08/29/2011
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
IP
  • MIG