UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 40793

Platform Flash - Does the PROM need to be powered-on before FPGA?

Description

When planning my power sequence, should I ensure that the Platform Flash PROM is powered before my FPGA?

Solution

Generally, anyexternal storage device needs to be ready when theFPGA read data from it, which means external device should be powered first.

There is an exceptionfor the Platform Flash. The FPGA pin INIT_B is connected to OE/RESET pin of the PROM in configuration scenario. If the FPGA does not finish power-up, INIT_B will be asserted low, which willhold the PROM in reset status. After power-up process of FPGA, if the PROMhas not finished power-up, thenOE/RESET willstay lowensuring configuration does not start on the rising edge of INIT. After power-up of PROM, OE/RESET will be released by PROM. This way can guarantee that theFPGA and PROM work correctly.

Note: INIT_B is bidirectional I/O in FPGA. Also, OE/RESET is bidirectional I/O in PROM.

AR# 40793
Date Created 04/08/2011
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Platform Flash
  • Platform Flash XA