I get the following warning message when I runmy Xilinx Platform Studio (XPS)design through implementation:
WARNING:NgdBuild:931 - The value of SIM_DEVICE on instance
type PLL_ADV has been changed from 'VIRTEX5' to 'SPARTAN6' to correct
post-ngdbuild and timing simulation for this primitive. In order for
functional simulation to be correct, the value of SIM_DEVICE should be
changed in this same manner in the source netlist or constraint file.
Functionaland Behaviorial simulations will work, but post-PAR simulations will not.
Thisissue is currently planned to be fixed in Embedded Design Kit13.3.