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AR# 41376

13.1 EDK - SIM_DEVICE generic does not include support for Spartan-6 FPGA


I get the following warning message when I runmy Xilinx Platform Studio (XPS)design through implementation:

WARNING:NgdBuild:931 - The value of SIM_DEVICE on instance
'clock_generator_0/clock_generator_0/PLL0_INST/Using_PLL_ADV.PLL_ADV_inst' of
type PLL_ADV has been changed from 'VIRTEX5' to 'SPARTAN6' to correct
post-ngdbuild and timing simulation for this primitive. In order for
functional simulation to be correct, the value of SIM_DEVICE should be
changed in this same manner in the source netlist or constraint file.


Functionaland Behaviorial simulations will work, but post-PAR simulations will not.

Thisissue is currently planned to be fixed in Embedded Design Kit13.3.

AR# 41376
Date 12/15/2012
Status Active
Type General Article
  • EDK - 13.1
  • EDK - 13.2
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