The following error occurs during the packing phase of the map command:
"FATAL_ERROR:Pack:pksbarouter.c:1967:1.15 - An attempt was made to connect signals rst_100 and vid_in<1> to the same load pin. Process will terminate. For technical support on this issue, please open a WebCase with this project attached at http://www.xilinx.com/support."
What does it mean and what can be done to avoid it?
This error involves the S and R inputs of the IDDR2 and ODDR2 components. According to page 54 of the Spartan-6 FPGA SelectIO Resources User Guide (UG381), "Software will issue an error if both R and S are connected":
In this case, both were connected. Disconnecting the S pin overcomes the issue and the design then completes implementation.
The error handling is scheduled to be improved in ISE Design Suite13.3 so that a user error is printed rather than this cryptic fatal error.