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AR# 4188

5.1i Timing - No negative offset, setup, or hold times are reported

Description

General Description:

When a clock has been placed on local routing, the clock delay can be greater than the input path delay. If an OFFSET constraint is placed on the input in question, TRCE/Timing Analyzer will report a negative OFFSET. (Similar results are sometimes seen with setup and hold times.)

Solution

The resolution is to place a TIMESPEC on the CLK net. This will cause the tools to evaluate the delay on the clock line.

For example:

TIMESPEC TS01 = FROM PADS(CLK) TO FFS 10ns;

where "CLK" is the net name between the pad and the buffer.

Another solution is to add delay to the data path. You can do this by moving the flip-flop further away from the IOB.

AR# 4188
Date Created 08/31/2007
Last Updated 01/18/2010
Status Archive
Type General Article