For the Spartan-6 MCB, the read data capture is implemented using the DQS signal from the memory as the capture clock.Calibration shifts DQS by 3/8 clock period upon reset to center align with the data. The capture point is set at 3/8 because that has been shown to provide most margin through verification and characterization.
It can be helpful to know the size of the capture window.While smaller windows can indicateissues with board signal skew, noise on DQS, and incorrect termination settings,larger capture windows do not necessarily indicate large margin because the critical path for data capture isthe clock phase decode in the MCB's DQS capture circuit. The capture window can be measured by manually setting the capture point earlier/later until capture fails.The procedure below describes how toimplementthe DQS capture window measurement on the SP601 development board.
The ftp location below contains an SP601 example design that allows you to make a window measurement by manually changing the DQS tap delay value:http://www.xilinx.com/txpatches/pub/applications/misc/42172.zip.
The following code shows the changes to the mcb_soft_calibration module.
WAIT_FOR_UODONE: begin //7'h18
Pre_SYSRST <= 1'b0; // SYSRST pulse
if (IODRPCTRLR_RDY_BUSY_N && MCB_UODONECAL) begin //IODRP Controller needs to be ready, & MCB needs to be done with hard calibration
MCB_UICMDEN <= 1'b1; // grab UICMDEN
//DQS_DELAY_INITIAL <= Mult_Divide(Max_Value, DQS_NUMERATOR, DQS_DENOMINATOR);
DQS_DELAY_INITIAL <= delay_vio_i;
STATE <= LDQS_WRITE_POS_INDELAY;
STATE <= WAIT_FOR_UODONE;
Instead of setting DQS_DELAY_INITIAL to the 3/8 bit period delay, it is set to delay_vio_i, which is controlled by the ChipScope VIO module in the SP601 example design. This allows you to manually set the DQS delay and determine the DQS capture window using the following process for the SP601 example design. This procedure can also be adapted to your design by making the appropriate changes to the mcb_soft_calibration module.
You can use the ChipScope tool to change the DQS tap delay count with the SP601 example design. This design is set up to run at 800 Mb/s currently. The main files that are needed are:
- Use the ChipScope tool to load the ".bit" file into the SP601 board, then select FILE > Open Project to open the ".cpj" file.
- Open the MyVIO2 console; with this you can set the DQS_Tap_Count value (default is 0).
- Perform a "Force Trigger" at any time to see the waveform displaying the MCB User Interface READ and WRITE data.
- Start to increment the DQS_Tap_Count value. Each time you increment, you must push the CPU RESET button on the SP601 board.
- The GPIO_LED0 light shows the "calib_done" signal of the MCB, and the GPIO_LED1 light shows the "error" signal.
- With the DQS_Tap_Count value = 0, you can see that the "error" light is on.
- You have to increment several taps (be sure to push CPU RESET each time) and at some point, you will see that the "error" light does not come on; for the SP601, that should be around tap 7.
- Keep incrementing the value until you find the other edge of the window; for the SP601, that should be around tap 34.
- If you keep incrementing after you find the other edge, you might see that the error light goes out again. This is NOT valid and you can see by looking at the ChipScope waveform that the MCB is no longer working.
- Now you have the tap window (e.g., 34-7 = 27 taps).
- You can also see that the Waveform window captures the "Max_Value," which tells you how many IDELAY taps are in the bit period. For example, the bit period for 800 Mb/s is 1250 ps. If the Max_Value is 44, then the value per tap is 1250/44 = 28ps. So, now we have 27 taps at 28 ps per tap. Therefore, the window is 27 x 28 = 756 ps.
- Max_Value changes over Voltage and Temperature, but you can always use this calculation to figure out how big your window is for any given Voltage and Temperature.