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AR# 42301

13.1 EDK, LMB_BRAM - Data sheet ECC Register Map Incorrect

Description

The 13.1 LMB BRAM data sheet (DS452, version 1.7) ECC register map is incorrect. The register map is on page 13 in "Table 6: LMB BRAM Interface Register Address Map".   What is the correct register map?

Solution

The correct LMB BRAM register map follows:

Table 6: LMB BRAM Interface Register Address Map

Base Address +

Offset (hex)

 

Register

Access Type

 

Description

C_BASEADDR + 0x0

ECC_STATUS

R/W

ECC Status Register

C_BASEADDR + 0x4

ECC_EN_IRQ

R/W

ECC Enable Interrupt Register

C_BASEADDR + 0x8

ECC_ONOFF

R/W

ECC On/Off Register

C_BASEADDR + 0xC

CE_CNT

R/W

Correctable Error Counter Register

C_BASEADDR + 0x100

CE_FFD

R

Correctable Error First Failing Data Register

C_BASEADDR + 0x180

CE_FFE

R

Correctable Error First Failing ECC Register

C_BASEADDR + 0x1C0

CE_FFA

R

Correctable Error First Failing Address Register

C_BASEADDR + 0x200

UE_FFD

R

Uncorrectable Error First Failing Data Register

C_BASEADDR + 0x280

UE_FFE

R

Uncorrectable Error First Failing ECC Register

C_BASEADDR + 0x2C0

UE_FFA

R

Uncorrectable Error First Failing Address Register

C_BASEADDR + 0x300

FI_D

W

Fault Inject Data Register

C_BASEADDR + 0x380

FI_ECC

W

Fault Inject ECC Register

 

This issue is planned to be fixed in Data Sheet 452 v1.8 in EDK 13.2.
AR# 42301
Date Created 05/24/2011
Last Updated 05/26/2014
Status Archive
Type General Article
Tools
  • EDK - 13.1
IP
  • LMB BRAM Interface Controller