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AR# 42346 Virtex-6 FPGA Integrated Block Wrapper v1.7 for PCI Express - What is the PMA_RX_CFG setting for an asychronous link?

What is the best setting for the GTX attributePMA_RX_CFG for an asynchronous link?

For asynchronous links, meaning that each link partner is clocked by a different oscillator, the recommended value for PMA_RX_CFG is 25'h05CE049. Set this value in the file calledgtx_wrapper_v6.v[hd] in the generated core's source directory.For more information regarding clocking and PCI Express, see (Xilinx Answer 18329).

Revision History
07/06/2011 - Initial Release

AR# 42346
Date Created 08/11/2011
Last Updated 05/19/2012
Status Active
Type Known Issues
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LXT
  • Virtex-6 SXT
IP
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )
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