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AR# 42485

Boards and Kits - ML561 - DDR2 SDRAM Termination at Memory

Description

The Virtex-5 FPGA ML561 Memory Interfaces Development Board (UG199) states in Table 5-3 that a Termination at Memory for Clocks CK/CK# of 100 Ohm differential termination between the pair is used.

Solution

This termination is in fact used for the ML561 board but since CK/CK# are not a "true" differential pair, Cypress recommends that a 50 Ohm pull-up termination to Vtt is used.
AR# 42485
Date Created 06/06/2011
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Virtex-5 LXT
Boards & Kits
  • ML561