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AR# 42517

Design Advisory for the 7 Series Integrated Block Wrapper for PCI Express - Port Changes in v1.1 rev 1 to be released in ISE 13.2


ISE 13.1 software customers using the7 Series Integrated Block Wrapper v1.1for PCI Express should be aware that ISE 13.2 software contains update "v1.1 Rev 1". Once ISE 13.2 software is installed, only "v1.1 Rev 1" is available for the 7 Series Integrated Block Wrapper. The port list on this version has been modified and users need to update their instantiations in current designs to account for these port changes.

Users should also note that the next update to this core will be v1.2, and this update will be released asynchronously to an ISE software update. The release date will be after ISE 13.2 and before ISE 13.3 software. The release will be posted as a zip file update to CORE Generator and customers will be notified through a Design Advisory answer record when it is released.

Customers who update their instantiations due to the port changes in "v1.1 Rev 1" will not need to make any more port changes when v1.2 is available. The port list of "v1.1 Rev 1" and v1.2 is the same.


To simplify core delivery and reduce the number of warning messages during implementation, ports for both the Endpoint and Root Port implementations are now brought to the top level of the wrapper. The v1.1 core only provides ports for Endpoint applications. Root portimplementationsare not supported in "v1.1 Rev 1", but will be supported in the future.

Additionally, v1.2 will make the MMCM and clocking resources available to the user by pulling the MMCM instantiation out of the wrapper source. This will enable the user to do Partial Reconfiguration and Partition based flows. Due to this change, new ports are added to "v1.1 Rev 1" for the clock inputs and outputs. These are not used in "v1.1 Rev 1", but will be used in v1.2.

It is recommended that the user open thexilinx_pcie_2_1_ep_7x.v in the <generated core name>/example_design directory and copy the instantiation of the core into their existing designs and then use the new wrappersource provided with "v1.1 Rev 1".

To see the new ports, look for the following two comments:

  • // 2. Clocking Interface - For Partial Reconfig Support
  • // RP Only

Revision History
07/05/2011 - Updated AR title
06/08/2011 -Initial Release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
42518 Design Advisory for the 7 Series Integrated Block Wrapper for PCI Express Master Answer Record N/A N/A

Associated Answer Records

AR# 42517
Date Created 06/10/2011
Last Updated 05/20/2012
Status Active
Type Design Advisory
  • Virtex-7
  • Kintex-7
  • Artix-7
  • ISE Design Suite - 13.2