Design Advisory for the 7 Series Integrated Block Wrapper for PCI Express Master Answer Record
Description
Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System.
Solution
For a list of all current Release Notes and Known Issues for the 7 Series Integrated Block Wrapper for PCI Express, please refer to the IP Release Notes Guide:http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf
Design Advisories
06/13/2011 (Xilinx Answer 42517) - Design Advisory for the 7 Series Integrated Block Wrapper for PCI Express - Port Changes in v1.1 rev 1 to be released in ISE 13.2
To update your Xilinx Alert Notification Preferences, please go to: http://www.xilinx.com/support/myalerts
Revision History
07/05/2011 - Updated AR title
06/13/2011 - Initial Release and AR 42517
Applies To
Devices
- Artix-7
- Kintex-7
- Virtex-7
IP
- 7 Series Integrated Block for PCI Express ( PCIe )