We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 42545

13.1 - FATAL_​ERROR:Pack:pksbarouter.c:1967:1.15 when inserting ChipScope ILA core in HDL and connecting a trigger input to '0'


I am generating a ChipScope ICON and ILA module and inserting it into HDL.

When I connect one or more trigger inputs to a signal that is directly set to '0' , l encounter the following error:


FATAL_ERROR:Pack:pksbarouter.c:1967:1.15 - An attempt was made to connect
   and oem_d2048_8_i/ODDRResetxR to the same load pin.   Process will terminate.
   For technical support on this issue, please open a WebCase with this project
   attached at http://www.xilinx.com/support.


In this case, the insertion of ChipScope forces MAP into the situation described in (Xilinx Answer 41876)

To avoid this issue, connect the trigger inputs to valid signals or to '1'.


Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
41876 13.1 - "FATAL_ERROR:Pack:pksbarouter.c:1967" when using DDR2 S and R Pins N/A N/A
AR# 42545
Date Created 06/09/2011
Last Updated 01/27/2015
Status Active
Type General Article
  • Spartan-6 LXT
  • ChipScope Pro - 13.1
  • ISE Design Suite - 13.1