This can affect designs that only have two banks in a column and require 4 Address/Control byte groups as the System Clock must be placed in the same bank as Address/Control.However, the Address/Control pins are occupying all the CC pins so there are none available to place the differential System Clock pins.
This can be worked around by allocating the Address/Control byte groups more efficiently. Such as moving Address/Control-3 from its default locations Byte Group T3 to T1 or T2 Byte Group to free up a CC pair for System Clock in T3 Byte Group.
This will be automatically done by default for users starting in the 13.3 software release.