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AR# 42783

MIG DDR2/DDR3 - Termination for Data Mask (DM) Signal when DM is disabled


The Memory Controller drives the Data Mask (DM) signal when it is enabled during MIG generation through the CORE Generator tool.

However, if the DM signal is disabled, all DM signals should be pulled to ground at the memory with a resistor value set defined by the memory vendor. 

Make sure that you verify all terminations through IBIS or other signal integrity simulations.

NOTE: This answer record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243)

The Xilinx MIG Solution Center is available to address all questions related to MIG.

Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.


It is necessary to pull down the Data Mask signal at the memory.

The FPGA is no longer driving the DM when DM is disabled, and therefore it must be properly pulled down to prevent accidental masking of data during writes to the memory. 

If the DM is not terminated properly, it can cause calibration failures and data errors during normal operation. 

Refer to the memory vendor datasheet for appropriate termination. 

Inappropriate termination can cause problems.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34556 MIG Virtex-6 DDR2/DDR3 - Termination and I/O Standard Guidelines N/A N/A
AR# 42783
Date Created 06/22/2011
Last Updated 08/28/2014
Status Active
Type Solution Center
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