UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 42838

7 Series Integrated Block for PCI Express - A Version 1.1 Core Does Not Implement in ISE Design Suite 13.2 Due to Port Changes on GTXE2_COMMON

Description

Version Found: v1.1
Version Resolved and other Known Issues: See (Xilinx Answer 40469).

The core fails to implement in the ISE Design Suite13.2 due to changes on the underlying GTXE2_COMMON module. This module is instantiated as part of the GTX wrapper by the 7 Series Integrated Block Wrapper.

Note: "Version Found" refers to the version the problem was first discovered. The problem may also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Solution

To fix this problem, generate a new core after installing the ISE Design Suite13.2. The ISE Design Suite13.2 contains v1.1 Rev 1 of the 7 Series Integrated Block Wrapper for PCI Express. See(Xilinx Answer 42517)for more information about v1.1 Rev 1.

Revision History
12/06/2011 - Added version resolved reference to AR 40469
10/21/2011 - Added link to release notes AR.
07/06/2011 - Initial Release

Linked Answer Records

Master Answer Records

Associated Answer Records

AR# 42838
Date Created 06/24/2011
Last Updated 05/20/2012
Status Active
Type Known Issues
Devices
  • Virtex-7
  • Kintex-7
Tools
  • ISE Design Suite - 13.2