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AR# 42840

MIG 7 Series - VREF Pins Are Chosen Even When "Internal VREF" Is Not Used


When running a Kintex-7 XC7K325T-FFG676 part through the MIG software, I do not select "Internal VREF" when configuring my design.

My UCF shows an internal FPGA pin (W8) tied to a DDR3 address line.

This is a VREF signal, can it be used for my memory interface?


This is not an issue as VREF pins can be used as GPIO when the bank contains only outputs.
AR# 42840
Date Created 06/28/2011
Last Updated 08/07/2014
Status Active
Type General Article
  • Kintex-7
  • Virtex-7
  • MIG