Spartan-6 FPGA GTP Transceiver - Reference clock phase noise mask

AR#	43154	Search For Another Answer
Topic	Serial Transceiver
Last Updated	08/17/2011
Status	Active

Description

The quality of the reference clock supplied to the PLL in the Spartan-6 GTP Transceiver can greatly impact the performance of the transmit jitter and receive jitter tolerance. Jitter or phase noise from the reference clock plays an important roll in determining this performance; phase noise being the preferred specification method as it allows the designer to incorporate the various frequency components that a time-based jitter specification might overlook. 

This Answer Record contains the reference clock phase noise limits that Xilinx recommends based on the PLL settings being used.

Solution

Depending on the reference clock being used, a different mask needs to be applied. The table below describes the points of a mask above which the reference clock phase noise should not exceed. If a reference clock does exceed these masks, it results in additional jitter on TX data.

Ref Clock Frequency (MHz)	Phase Noise at Offset Frequency (dBc/Hz)
	10 KHz	100 KHz	1 MHz	10 MHz
100.0	-112	-130	-130	-135
125.0	-120	-130	-130	-135
156.25	-120	-130	-130	-135

NOTE: If your desired reference clock rate is not listed in the table above, please use the phase noise mask for the nearest reference clock frequency.