UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 43315

13.2 PlanAhead - Cannot loc terminal "XX_n" at site XX; loc is blocked

Description

I have a design in PlanAhead instantiating differential I/O buffers (OBUFDS). 

The UCF has LOC constraints on these nets, but PlanAhead fails to resolve the instance, and displays a critical warning message:

Parsing UCF File [..\top.ucf]
WARNING: [STA-11] No lib cell found for I/O cell OBUFDS_DUAL_BUF
WARNING: [STA-9] Creating black box model for cell OBUFDS_DUAL_BUF
INFO: [STA-16] For original lib cell OBUFDS_DUAL_BUF no cell OBUFDS or OBUFDS found.
CRITICAL WARNING: [Constraints-5] Cannot loc terminal 'XX_n' at site XX, loc is blocked [..\top.ucf:2]

The LOC constraint for OBUFDS in the UCF cannot be read through NGDBuild.

Solution

This issue has been fixed in version 13.3 of PlanAhead.

In PlanAhead 13.2 and earlier versions, you can work around the issue by doing the following:

  1. Apply the LOC constraints from another UCF directly to NGDBuild via the "-uc" switch.
  2. Add the I/O standard parameter in the code.
     

For example:

OBUFDS #(
.IOSTANDARD("DIFF_HSTL_I") // Specify the output I/O standard
)
OBUFDS_1 (
.O(dout_p), // Diff_p output (connect directly to top-level port)
.OB(dout_n), // Diff_n output (connect directly to top-level port)
.I(data_2) // Buffer input
);

AR# 43315
Date Created 03/02/2012
Last Updated 08/11/2014
Status Active
Type Known Issues
Devices
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Virtex-6Q
  • Virtex-6QL
  • Less
Tools
  • ISE Design Suite - 13.2