This section of the MIG Design Assistant will guide you to details on the clocking and reset for the Spartan 6 MCB. Please select from the options belowto find information related to your specific question.
Note:This Answer Record is a part of the Xilinx MIG Solution Center(Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.
(Xilinx Answer 37224)- Modifying the input clock frequency
(Xilinx Answer 34934) - Sharing BUFPLL_MCBs
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 37498 | MIG Design Assistant - Spartan-6 Core Functionality | N/A | N/A |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 37224 | Spartan-6 MCB MIG - Changing the input clock frequency | N/A | N/A |
| 34934 | MIG Spartan-6 MCB - Is it possible to share PLL and BUFPLL_MCB resources in multi-controller designs? | N/A | N/A |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 34934 | MIG Spartan-6 MCB - Is it possible to share PLL and BUFPLL_MCB resources in multi-controller designs? | N/A | N/A |
| 34153 | Spartan-6 FPGA MCB - Can MCB pins be swapped to help facilitate board layout? | N/A | N/A |
| 37224 | Spartan-6 MCB MIG - Changing the input clock frequency | N/A | N/A |
| 36431 | MIG/MPMC Spartan-6 MCB - Is there a preferred or required PLL location that should be used within the design? | N/A | N/A |