The placement of inmode bits is incorrect in the opmode block if custom instruction is selected. To work around this issue, deconsolidate the control ports of the dsp48e1.
This issue is scheduled to be fixed in the next System Generatorrelease.
For System Generator for DSP Release Notes from other versions, see (Xilinx Answer 29595).
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 29595 | Xilinx DSP Tools, System Generator for DSP, and AccelDSP Synthesis Tool - Release Notes and Known Issues | N/A | N/A |
| Answer Number | Answer Title | Version Found | Version Resolved |
|---|---|---|---|
| 17966 | DSP Tools, System Generator for DSP, AccelDSP - Which versions of System Generator for DSP and AccelDSP synthesis tool are compatible with which versions of ISE design tools and MATLAB? | N/A | N/A |