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AR# 43576

Spartan-6 Integrated Block for PCI Express - Updated GTP Attributes for v1.4 core version


When using the v1.4 Integrated Block Wrapper for PCI Express, the following changes are recommended for the GTP attributes. These values are based on the most recent characterization results and were not incorporated into the latest legacy TRN interface version of the wrapper. The legacy TRN interface is the 1.# version series of the wrapper. These settings are included in the v2.3 AXI4-Steam interface version of the wrapper

Note that if an older version of the core is being used (either an earlier v1.# core or v2.# core), the most recent attributes are available in the v2.3 wrapper with the only difference between v1.4 and v2.3 being the below.


Change the following attributes in thegtpa1_dual_tile_wrapper.v[hd] file:

PMA_RX_CFG_0/1 should be25'h05CE044
PLL_CP_CFG_0/1should be 8'h21

For asynchronous clocked links, see (Xilinx Answer 42339) for an alternate PMA_RX_CFG value.

Revision History
08/11/2011 - Initial Release

AR# 43576
Date Created 08/11/2011
Last Updated 05/19/2012
Status Active
Type Known Issues
  • Spartan-6 LXT
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )