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AR# 43591

Design Advisory for Virtex-6 FPGA GTH Transceivers - Updates Required to Address RXBUFRESET-Related Initialization Sequence and BUFFER_CONFIG_LANEx Issues

Description

When configuringthe Virtex-6 FPGA GTH Transceivers using the HDL wrappers generated byv1.8 and earlier versions of the Virtex-6 FPGA GTH Transceiver Wizard,the GTH transceiver might not initialize properly due to an RXBUFRESET interval that is too short, resulting in data errors.

Additionally,the BUFFER_CONFIG_LANEx attributes must also be updated to eliminate a second potential cause ofdata errors.

Solution

1. Updated GTH Transceiver Initialization Sequence:

In the module 'v6_gthwizard_v1_8_quad.vhd' or 'v6_gthwizard_v1_8_quad.v',RXBUFRESET is synchronized betweenthe TXUSRCLKand RXUSRCLK domains. In this module, the RXBUFRESET pulse is currently onlyone cycle long, and that can be lost when transferred from the TXUSRCLK domain to the RXUSRCLK domain. This couldstopGTH initialization from completing properly, resulting indata errors. This isfixed in v1.8 rev 2 ofthe Virtex-6 FPGA GTH Transceiver Wizard design by adding pulse synchronizer logic. This enhancement ensures that the pulse is captured correctly on theRXUSRCLK domain.

For more details on the Virtex-6 FPGA GTH Transceiver initialization, please refer to the "Reset and Initialization" section of the Virtex-6 FPGA GTH Transceivers User Guide (UG371).

2. Updated BUFFER_CONFIG_LANEx Attribute Values:

The BUFFER_CONFIG_LANEx attributesfor Virtex-6 GTH Transceivers are currently set to auto adjustment modein theVirtex-6 FPGA GTH Transceiver Wizard v1.8. Occasionally, setting this attribute to auto mode can cause data errors in the link. For this reason, the BUFFER_CONFIG_LANEx attributes should be set tomanual adjustment mode instead, as discussed in(Xilinx Answer 42927).

The fixes to both of the above issues can be generated natively by the Virtex-6 FPGA GTH Transceiver Wizard v1.9 released with theISE Design Suite 13.3 version.The following tactical patch ZIP file for v1.8 of the Virtex-6 FPGA GTH Transceiver Wizardcan also be used:

http://www.xilinx.com/txpatches/pub/swhelp/ise13_updates/v6_gthwizard_v1_8_rev2.zip

To use this patch, first unzip the files to a location of your choosing, generate an environment variable called MYXILINX, and set it to the location of the /rtf directory that is to be generated.For additional information on this variable and its use, see (Xilinx Answer 2493).

Note: This tactical patch is only compatible with ISE version 13.2. Use this patch with Virtex-6 HXT production silicon devices only.

The v1.9of the Virtex-6 FPGA GTH Transceiver Wizard in ISE 13.3 that includes these fixes only supports Production Silicon. For the updated wizard with fixes that supports ES Silicon, theVirtex-6 FPGA GTH Transceiver Wizard v1.7 Rev2 in ISE 13.3 should be used.

IP Cores

Please see the following Answer Records forthe impact of thesechanges on specific protocol IP cores:

Ten Gigabit Ethernet PCS/PMA: see (Xilinx Answer 43703)

Aurora 64B/66B:see(Xilinx Answer 43713)

Linked Answer Records

Associated Answer Records

AR# 43591
Date Created 08/19/2011
Last Updated 05/20/2012
Status Active
Type Design Advisory
Devices
  • Virtex-6 HXT
IP
  • Virtex-6 FPGA GTH Transceiver Wizard
  • Aurora 64B/66B
  • Ten Gigabit Ethernet PCS/PMA