This section of the MIG Design Assistant focuses on the available MIG options for Spartan-6 FPGA DDR3/DDR2 designs. The MIG tool is designed to walk users through the generation of a MIG core without needing to refer to additional documentation.If questions do exist on a specific MIG tool option, please see the "MIG Tool: Step-by Step Instructions" section within the Spartan-6 FPGA Memory Interfaces User Guide (UG416).
Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.
For moreinformation on the specific features supported by the MIG Spartan-6 FPGA DDR3/DDR2 design, or for questions on the pinout of the core, please see the following answer records.