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AR# 43600

MIG Spartan-6 FPGA DDR2/DDR3 - MIG Options

Description

This section of the MIG Design Assistant focuses on the available MIG options for Spartan-6 FPGA DDR3/DDR2 designs. The MIG tool is designed to walk users through the generation of a MIG core without needing to refer to additional documentation.If questions do exist on a specific MIG tool option, please see the "MIG Tool: Step-by Step Instructions" section within the Spartan-6 FPGA Memory Interfaces User Guide (UG416).

Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.

Solution

For moreinformation on the specific features supported by the MIG Spartan-6 FPGA DDR3/DDR2 design, or for questions on the pinout of the core, please see the following answer records.

(Xilinx Answer 40155) MIG Design Assistant - Spartan-6 FPGA Supported Features
(Xilinx Answer 43318) MIG Spartan-6 FPGA MCB - How to Verify that Pinout Requirements Are Met

Linked Answer Records

Associated Answer Records

AR# 43600
Date Created 11/14/2011
Last Updated 12/15/2012
Status Active
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
IP
  • MIG Virtex-6 and Spartan-6