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AR# 43641

MGT - Does GTX/GTP/GTH/GTY support REFCLKs with HCSL I/O standard?


Typically, PCI reference clocks are sourced with a HCSL I/O standard.

Does GTP/GTX/GTH/GTY support REFCLKs with a HSCL I/O standard?


GTP/GTX/GTH/GTY generally supports REFCLKs from LVDS/LVPECL oscillators as mentioned in the user guide. 

When there is a requirement to source HCSL I/O standards (as required by PCI applications), the HSCL clock will work with the 7 series and UltraScale/UltraScale+ GTs as long as they meet the phase noise mask requirement, the voltage swing, and any other requirements laid out in the datasheet. 

HCSL normally does meet these requirements and can be used. 

7 Series Phase noise masks can be found in (Xilinx Answer 44549). The UltraScale phase noise masks can be found in the device data sheets.

To reach the proper and expected voltage swing requires the proper topology. 

In the diagram below, if Rs is 33 ohm and internal to the chip is the 50 ohm Rt, the swing will be in the range of 750mv X2 or 1550mv diff.

The user must make sure their network will deliver the required voltage swing.

Some HCSL drivers are open source and might need resistors to ground as well. 

It is the user's responsibility to supply the proper terminations for their driver. 

From the FPGA point of view, HCSL is capable of driving the GTs as long at it meets the data sheet specs and the phase noise guidelines. 

In this case, care needs to be taken to meet the amplitude specs.  

AR# 43641
Date Created 08/15/2011
Last Updated 04/20/2016
Status Active
Type General Article
  • Artix-7
  • Kintex-7
  • Virtex-7
Boards & Kits
  • Virtex-6 FPGA ML605 Evaluation Kit