Design Advisory Master Answer Record for Spartan-6 FPGA SP601 Evaluation Kit
Description
Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System: http://www.xilinx.com/support/myalerts.
This Design Advisory covers the Spartan-6 FPGA SP601 Evaluation Kit, including critical issues with the reference design delivered with the kit.
Solution
(Xilinx Answer 36291) - MIG, MPMC, Spartan-6 MCB -Memory failures occur on initial configuration(Xilinx Answer 45011) - Design Advisory for Spartan-6 - BUFPLL LOCK output always high in Bank 2
Revision History
12/13/2011 - Answer Record 45011 added
09/13/2011 - Minor edit to title
08/09/2011 - Initial Release with Answer Record 36291
Applies To
Boards & Kits
- Spartan-6 FPGA SP601 Evaluation Kit