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AR# 43829

Design Advisory for Virtex-6 FPGA GTH Transceivers - Incorrect RXBUFRESET connections in the wrapper in x4 mode

Description

This answer record explains the correct connections to be made for RXBUFRESET in the HDL wrappers generated bytheVirtex-6 FPGA GTH Transceiver Wizard in ISE Design Suite13.2 and earlier versions when configuring the GTH transceivers in x4 mode (GTHX4LANE=1).

Solution

Issue

The Virtex-6 FPGA GTH transceivers can be configured in a x4 mode by setting GTHX4LANE to '1', where lanes 0, 1, 2 and 3 form a single x4 link.In this mode, a change in the control settings on the master lane (lane 0) also causes the same effect on the slaves. However, this does not apply to the RXBUFRESETport, so this reset port should be connected individually for all of the four lanes.But, in the module 'v6_gthwizard_v1_8_quad.vhd' or 'v6_gthwizard_v1_8_quad.v',RXBUFRESET for lanes 1/2/3 areincorrectly tied to '0'.

Work-around

The RXBUFRESET port connections in an x4 mode are currently set as follows when GTHX4LANE=1:

RXBUFRESET0 => rxbufreset0_i,
RXBUFRESET1 => tied_to_ground_i,
RXBUFRESET2 => tied_to_ground_i,
RXBUFRESET3 => tied_to_ground_i,

This should be changed to:

RXBUFRESET0 => rxbufreset0_i,
RXBUFRESET1 =>rxbufreset0_i,
RXBUFRESET2 =>rxbufreset0_i,
RXBUFRESET3 =>rxbufreset0_i,

This isfixed in the HDL wrappers generated by the Virtex-6 FPGA GTH Transceiver Wizard v1.9 inISE design tools version 13.3.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34565 Design Advisory Master Answer Record for Virtex-6 FPGA N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
34565 Design Advisory Master Answer Record for Virtex-6 FPGA N/A N/A
38596 Virtex-6 FPGA GTH Transceiver - Known Issues and Answer Records List N/A N/A
AR# 43829
Date Created 08/31/2011
Last Updated 05/22/2012
Status Active
Type Design Advisory
Devices
  • Virtex-6 HXT
IP
  • Virtex-6 FPGA GTH Transceiver Wizard