UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 44146

13.2 System Generator for DSP - Why is there no output from Viterbi v7.0 in Simulink simulation?

Description

I am using Xilinx System Generator for DSP design tool to build a hardware core using the Viterbi Decoder 7.0 block, but all the outputs are always NAN (even the data valid signal), and I do not see any output on the WaveScope window (for example).

What am I missing?

Solution

Viterbi v7.0 requires a valid license to run Simulink simulations. You can obtain an evaluation license from the Viterbi product page: http://www.xilinx.com/content/xilinx/en/products/intellectual-property/viterbi_decoder.html. Click Evaluate on the left of the page.

For System Generator for DSP Release Notes for other versions, see (Xilinx Answer 29595).

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
29595 Xilinx DSP Tools, System Generator for DSP, and AccelDSP Synthesis Tool - Release Notes and Known Issues N/A N/A

Associated Answer Records

AR# 44146
Date Created 09/19/2011
Last Updated 11/10/2014
Status Active
Type Known Issues
Tools
  • System Generator for DSP - 13.2
IP
  • Viterbi Decoder