In ISE 13.3 software, the IBERT core for the Virtex-7 GTX and Kintex-7 GTX FPGAs will fail implementation if you load a board configuration setting for the KC705 (Kintex-7) or the VC707 (Virtex-7). If you load one of these board configuration setting files, you will get an error message similar to the one below:
A Tcl scripting error has occurred:
can't read "bcsArray(rxoutclk_n_pin_location)": no such element in array
while executing
"$rxoutclk_n_pin_location SetValue $bcsArray(rxoutclk_n_pin_location) "
(procedure "update_rxoutclk_n_pin_location" line 13)
invoked from within
"update_rxoutclk_n_pin_location"
ERROR:sim:477 - An internal error has occurred during the GUI customization.
This is a known issue for ISE 13.3 software and will be fixed in 13.4. To work around this issue, do not use the board configuration setting in IBERT. You will instead need to go through the wizard and fill out the settings manually to match what is needed for your board.