We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 44477

LogiCORE IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) v2.2 - Release Notes and Known Issues for ISE Design Suite 13.3


This answer record contains the Release Notes for the LogiCORE IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) v2.2 Core, released in ISE Design Suite 13.3, and includes the following:

  • New Features
  • Supported Devices
  • Resolved Issues
  • Known Issues

For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide.


New Features

  • Reduced number of clocking resources for 7 Series devices.

Supported Devices

  • Virtex-6 HXT (not including FF1154 packages)
  • Kintex-7 160/325/410T FFG packages
  • Virtex-7 585/1500/2000/X485T

Resolved Issues

  • (CR614608) - Verilog functional demo testbenchforVirtex-6 HXT,where the configuration vector in the example design is not completely defined, resulting in Zs during simulation.
  • (CR607158) - The behavior ofexternal status vector bits, which should always return 1s, but instead return 0s.
  • (CR607156) - Status vector bit 268 thatdoes not follow same rules as bit 256.
  • (CR595451) - Extra clocking resourcesin 7 Series FPGAS.(Clocking resourcesare now reduced to 3 BUFG + 1 BUFR for Virtex-7 devices and 4BUFG + 1 MMCM for Kintex-7 devices.)

Known Issues

  • (Xilinx Answer 44470) -LogiCORE IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) v2.2 - Virtex-6 HXT - Incorrect arbitration logic in the management port
  • (Xilinx Answer 43591) - Design Advisory for Virtex-6 FPGA GTH Transceivers - Updates Required to Address RXBUFRESET-Related Initialization Sequence and BUFFER_CONFIG_LANEx Issues
  • (Xilinx Answer 45166) - Virtex-6 FPGA GTH Transceivers - Lane powerdown can cause burst of errors in the Quad
  • (Xilinx Answer 46053) - LogiCORE IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) v2.2 - Kintex-7 FPGA example design does not place
  • (Xilinx Answer 46912) - LogiCORE IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) v2.2 - Targeting General ES silicon for 7 Series Devices
AR# 44477
Date Created 10/24/2011
Last Updated 05/20/2012
Status Active
Type Release Notes
  • 10 Gigabit Ethernet Media Access Controller