We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 44478

13.2 EDK - What happens to the AWUSER signals when not driven by a master?


If I have several masters that have access to a peripheral with the AWUSER signal, what happens to this signal when I am not writing to it?


This signal will remain 0 when not being written to, regardless of the number of masters.
AR# 44478
Date 11/13/2012
Status Active
Type General Article
  • EDK - 13.1
  • EDK - 13.2
  • EDK - 13.3
Page Bookmarked