This Release Note is for theSelectIO Wizard v3.3 released in ISE Design Suite 13.4 and contains the following:
The SelectIO Wizard v3.3 supports the 7 series, Zynq, Virtex-6 and Spartan-6 families. The Wizardis used to simplify the integration of the SelectIO technology in designs.
New Features in v3.2
There are no new features in this revision of the Wizard.
Bug Fixes in v3.3
In v3.2 of theSelectIO Wizard, there was not an optionto add an ODELAY in the path of the clock when forwarding a clock out of the device. This has been resolved in v3.3
In v3.2 of the SelectIO Wizard, when you enable clock forwarding from the fabric clock (using an MMCM), the example design incorrectlyuses the CLKDIV output from MMCM (the low speed parallel interface clock) to forward out.The ODDR should be connected to the high speedCLKOUT0 output of the MMCM to forward out of the device.This has been resolved in v3.3
Bug Fixes in v3.2
In v1.5 of the SelectIO Wizard for Spartan-6devices,the user is unable to use bitslip in Networking_pipelined mode. This was fixed in ISE Design Suite 12.4.
In v3.3 of the SelectIO Wizard,Defense Grade Virtex-6Q Lower Power devices are not supported. For more information, see (Xilinx Answer 42529)