This Release Note is for the Clocking Wizard v3.3 released in ISE Design Suite 13.4 and contains the following:
The Clocking Wizard v3.4 supports the 7 series and Zynq FPGAs.
New Features in v3.3
There are no new features in this version of the Wizard.
Bug Fixes in v3.3
In Clocking Wizard v3.2, the user is unable to select fine phase shift on the second page of the Wizard unless Dynamic Phase Shift was enabled on the first page. If the user enables Dynamic Phase Shift on the first page of the Wizard, selects Use Fine Phase Shift on the second page, then goes back to pageone and deselects Dynamic Phase Shift, the Use Fine Phase Shift option will still be checked when they return to page two. However, they are unable to deselect it unless they return to pageone again to enable Dynamic Phase Shift. This was fixed in v3.3.
In v3.2 of the Clocking Wizard, changing the input jitter from UI to pS causes the Wizard not to update the input frequency. This is resolved in v3.3.
In v3.2 of the Clocking Wizard, incorrectly lists the Spartan-6 Low Power Devices as pre-production.
Bug Fixes in v3.2
In v3.1 ISE Design Suite 13.1, the Clocking Wizard incorrectly allowed the user to set the fractional divider values when Dynamic Phase Shift is selected. This was fixed in v3.2.
In v3.2 of the Clocking Wizard, Defense Grade Virtex-6Q Lower Power devices are not supported. For more information, see (Xilinx Answer 42530)