UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 44540

MIG 7 Series v1.3 DDR3 - Example Design Does Not Generate any Traffic in Hardware with Debug Feature Enabled

Description

When running the MIG 7 Series v1.3 DDR3 Example Design with the Debug feature enabled, (DEBUG_PORT=="ON") in the hardware, the traffic is not generated.

Solution

This is a known issue with the design that only occurs when the Debug feature is enabled.To work around this, locate the following snippet of code in the example_top.v module:

generate
if (DEBUG_PORT=="ON") begin: CHIPSCOPE_INST

assign ddr3_cs0_clk = clk;
assign ddr3_cs4_clk = clk;
assign vio_modify_enable = ddr3_vio3_sync_out[36];
assign vio_data_mode_value = ddr3_vio3_sync_out[40:37];
assign vio_addr_mode_value = ddr3_vio3_sync_out[43:41];
assign vio_instr_mode_value = ddr3_vio3_sync_out[47:44];
assign vio_bl_mode_value = ddr3_vio3_sync_out[49:48];
assign vio_fixed_bl_value = ddr3_vio3_sync_out[57:50];
assign vio_data_mask_gen = ddr3_vio3_sync_out[58];
assign vio_pause_traffic = ddr3_vio3_sync_out[59];
assign vio_fixed_instr_value = ddr3_vio3_sync_out[62:60];
assign dbg_clear_error = ddr3_vio3_sync_out[63];
assign ddr3_vio1_async_in[200] = tg_compare_error;

Traffic is not generated because these values are undefined.To enable traffic generation, hard code the following ports:
.vio_pause_traffic (1'b0),
.vio_bl_mode_value (2'b10),
.vio_fixed_bl_mode (8'd64),
.vio_fixed_instr_value (3'b001),
.vio_data_mask_gen (1'b01),

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
43099 MIG 7 Series v1.3 - Release Notes and Known Issues for ISE Design Suite 13.3 N/A N/A

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
43099 MIG 7 Series v1.3 - Release Notes and Known Issues for ISE Design Suite 13.3 N/A N/A
AR# 44540
Date Created 10/13/2011
Last Updated 05/22/2012
Status Active
Type Known Issues
Devices
  • Artix-7
  • Kintex-7
  • Virtex-7
IP
  • MIG 7 Series