We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 44645

13.3, Virtex-6, ML605 GTX IBERT - "ml605 bank113fmchpc" Board Configuration Setting sets refclk incorrectly


The following answer record discusses a known issue for the 13.3 version of the Virtex-6 GTX IBERT core. The "ml605 bank113fmchpc" board configuration setting sets the wrong refclk which needs to be modified by the user for a proper design to be generated for the ML605 board.


If the "ml605 bank113fmchpc" board configuration setting is used in the Virtex-6 GTX IBERT core in 13.3, a modification will need to be made to generate a working design.

In the IBERT Wizard, select the "ml605 bank113fmchpc" board configuration setting. Press "next" to get to page 4. The REFCLK sources are currently set to "MGTREFCLK0 113", change this setting to MGTREFCLK0 114. This change is necessary because the bank for the MGT has to borrow the refclk from the adjacent QUAD. No other changes are necessary to generate a working IBERT design.

This is a known issue in 13.3 and is scheduled to be fixed in 13.4.
AR# 44645
Date Created 10/19/2011
Last Updated 10/27/2011
Status Active
Type Known Issues
  • Virtex-6 LXT
  • ChipScope Pro - 13.3