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AR# 44663

13.3, Virtex-6, GTX IBERT - Unchecking the "Generate Bitstream" option causes the generation of core to fail


When I generate a design using the Virtex-6 FPGA GTX IBERT core in the ISE 13.3 software, un-checking the "Generate Bitstream" option causes the core generation to fail with the following error message:

"ERROR:coreutil - ERROR:sim:159 - An internal error has occurred. Closing IBERT Virtex6 GTX (ChipScope Pro - IBERT) GUI
ERROR:sim - Customizer could not get SIM parameters from IP model at exit
An Error occurred during Customization"


This is a known issue in the ISE 13.3 software for the Virtex-6 FPGA GTX IBERT core and is scheduled to be fixed in 13.4.

To work around this issue:
  1. Leave the "Generate Bitstream" option checked.
  2. Generate the core and allow implementation to complete.
  3. If there are any changes that are needed to be made to the core output files, make the changes once generation of the bit file is complete and re-implement the design once the changes are complete.
AR# 44663
Date Created 10/20/2011
Last Updated 10/27/2011
Status Active
Type Known Issues
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
  • ChipScope Pro - 13.3