We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 4473

Foundation F1.4 Simulator, Coregen1.4: Simulator gives Page Fault with large bus Sine/Cosine core.


Keywords: Foundation 1.4, Simulator, Coregen, Core Generator, Sin/Cos, Sine, Cosine, Lookup table, LUT, unknown

Ugency: Hot

General Description: In F1.4, when trying to functionally
simulate a Sin/Cos Coregen module the simulator may crash with a page
fault error:
SIMUL caused an invalid page fault in module <unknown> at 000:10001523

The project manager window displays:
Simul: ...ns Bus conflict encountered in the following node:...


This page fault is caused by the large number or warnings which are
attempting to be written to the log screen. The warnings are indicating
Bus Conflict Errors, which are caused by the fact that the implementation
of the larger Sine/Cosine cores is done using TBUFs, and the simulator
flags possible bus conflicts on the outputs of these TBUFs. These warnings
can safely be ignored, so the problem may be worked around by turning
off the reporting of these messages to the screen.

This can be done by selecting the following menu items:

Options -> Preferences -> Reports Tab

On the Reports Tab, uncheck the Bus Conflict Error classes for
Display, Register, and Report.

This problem does not exist in Foundation F1.5.
AR# 4473
Date Created 08/21/1998
Last Updated 07/30/1999
Status Archive
Type General Article