We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 44761

Are the Virtex 5/6 RS pin values retained after a Power Cycle?


Are the Virtex 5/6 RS bits set in the WBSTAR register retained after a Power Cycle?


No they are not.

They will reset back to the default which is 00.

External pullups/downs will be needed to select which Revision will be loaded upon power up.
AR# 44761
Date Created 10/28/2011
Last Updated 11/28/2014
Status Active
Type General Article
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • More
  • Virtex-5 SXT
  • Virtex-5 TXT
  • Virtex-5Q
  • Virtex-5QV
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Virtex-6Q
  • Virtex-6QL
  • Less