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AR# 44811 MIG 3.61 Spartan-3E DDR - Example/user design warnings when verifying UCF

Description

The following warnings can occur in the MIG GUI when verifying a UCF file previously generated by MIG, but that has not been changed:

WARNING:LUT delay location constraint "top_00/data_path0/data_read_controller0/gen_delay[0].dqs_delay_col0/five-slice_x1y59" for dqs_delayed column of dqs[0] is invalid or missing.
WARNING:LUT delay location constraint "top_00/data_path0/data_read_controller0/gen_delay[0].dqs_delay_col0/four-slice_x0y58" for dqs_delayed column of dqs[0] is invalid or missing.
WARNING:LUT delay location constraint "top_00/data_path0/data_read_controller0/gen_delay[0].dqs_delay_col0/one-slice_x0y59" for dqs_delayed column of dqs[0] is invalid or missing.
WARNING:LUT delay location constraint "top_00/data_path0/data_read_controller0/gen_delay[0].dqs_delay_col0/six-slice_x1y58" for dqs_delayed column of dqs[0] is invalid or missing.
WARNING:LUT delay location constraint "top_00/data_path0/data_read_controller0/gen_delay[0].dqs_delay_col0/three-slice_x0y58" for dqs_delayed column of dqs[0] is invalid or missing.
WARNING:LUT delay location constraint "top_00/data_path0/data_read_controller0/gen_delay[0].dqs_delay_col0/two-slice_x0y59" for dqs_delayed column of dqs[0] is invalid or missing.
...

Are these warnings safe to ignore?

Solution

In some cases these are false warnings and can be safely ignored. Verify that the placing and routing of the example design generated by MIG is performed successfully and correctly before confirming these can be ignored.

There are no plans to fix this in a future version of MIG.

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
38951 MIG v3.61 - Release Notes and Known Issues for ISE Design Suite 12.4-14.2 N/A N/A

Actions

AR# 44811
Date Created 11/08/2011
Last Updated 05/19/2012
Status Active
Type Known Issues
Devices
  • Spartan-3E
Tools
  • ISE Design Suite - 13.2
IP
  • MIG
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