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AR# 44875 System Generator for DSP - Why does CIC Compiler v2.0 block have poor timing performance when truncation is used?

In System Generator for DSP, why does CIC Compiler v2.0 block have poor timing performance when truncation is used?

This is an issue with using block RAM and selecting truncation.

To solve this problem, use full precision output instead of truncating.

This is being investigated for a fix in a future release, but it is not yet scheduled. Please use the work-around above.

For System Generator for DSP Release Notes from other versions, see (Xilinx Answer 29595).

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
29595 Xilinx DSP Tools, System Generator for DSP, and AccelDSP Synthesis Tool - Release Notes and Known Issues N/A N/A
AR# 44875
Date Created 11/21/2011
Last Updated 01/16/2013
Status Active
Type Known Issues
Tools
  • System Generator for DSP
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