The fan control circuitry on the revision C KC705 Evaluation Board uses two FPGA pins to control the performance of the FPGA cooling fan. These pins are pin U22 and pin L26.
Pin U22 monitors the SM_FAN_TACH signal. This signal is an input into the FPGA that delivers information about the fan's current rotational speed.
Pin L26 drives the SM_FAN_PWM signal. This signal is an output from the FPGA and drives a PWM pulse into the fan control circuit to enable the fan to spin properly. If pin L26 is completely unused in a customer design, the default ISE behavior is for thepin to be pulled low. When configured as pull-down, pin L26 interferes with the fan control circuit, and the fan will not operate.
To rectify this situation, perform one ofthe following fixes:
For RevD and the RTM version of the KC705 board,a "strong" 1k pulluphas been added for the SM_FAN_PWM control pin to override the bitgen selection of a weak Pulldown. This wouldensure that the only way a customer could turn the fan off is to actively drive the pin and force a selection to a low logic level.
Note: this issue is not expected with the KC705 reference designs that ship with the board. Thisissue is only a possibility with custom designs.
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